1. Field of the Invention
The present invention relates to a fabrication method for a chip size semiconductor package (CSP), and more particularly, to an improved fabrication method for a CSP in which conductive wires are bonded directly on bonding pads formed on a semiconductor chip.
2. Description of the Prior Art
The conventional CSP fabrication method will now be described in detail with reference to FIGS. 1A through 1F.
First, as shown in FIG. 1A, a bonding pad 13 is formed on a semiconductor chip 11 (or a wafer), and a passivation layer 15 is formed on the upper surface of the semiconductor chip 11 except the bonding pad 13. Then, as shown in FIG. 1B, a first conductive layer 17 formed of TiW and a second conductive layer 19 formed of Au are sequentially deposited by a sputtering method on the bonding pad 13 and the passivation layer 15. As shown in FIG. 1C, one end of a conductive wire 21 formed of gold (Au) is bonded on the surface of the second conductive layer 19 above the bonding pad 13, and then the conductive wire 21 is cut to be formed in a straight or curved line of 1 to 2 mm. The conductive layer 19 is used as a common terminal when a post electroplating process is carried out.
As shown in FIG. 1D, a photoresist 23 is formed on the second conductive layer 19 except the portion where the bonding pad 13 is formed. Then, as shown in FIG. 1E, to enhance the strength of the conductive wire 21, a nickel (Ni) plating 25 is performed on the surface of the conductive wire 21. As shown in FIG. 1F, a gold (Au) plating 27 is carried out on the nickel-plated portion of the conductive wire 21. The gold plating improves an electrical solder joint between the conductive wire 21 and a printed circuit board (PCB) when the CSP is mounted on the PCB, and prevents corrosion. An electroplating method can be used for plating nickel and gold. Finally, the photoresist 23 is removed and the first and second conductive layers 17 and 19 are removed except in the region where the bonding pad 13 is formed.
The conventional CSP fabrication method has the following disadvantages. In order to enhance the strength of the conductive wire 21 and the electrical solder joint, and in order to prevent corrosion, very difficult processes with associated high cost, such as sputtering, photoresist deposition and etching are required.